213 lines
7.7 KiB
ArmAsm
213 lines
7.7 KiB
ArmAsm
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/* File: startup_ARMCM0.S
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* Purpose: startup file for Cortex-M0 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.2
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* Date: 15 Nov 2011
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*
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* Copyright (c) 2011, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the ARM Limited nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.syntax unified
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.arch armv6-m
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0xc00
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x100
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __Vectors
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__Vectors:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long POWER_CLOCK_IRQHandler /* POWER_CLOCK */
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.long RADIO_IRQHandler /* RADIO */
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.long UART0_IRQHandler /* UART0 */
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.long SPI0_TWI0_IRQHandler /* SPI0_TWI0 */
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.long SPI1_TWI1_IRQHandler /* SPI1_TWI1 */
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.long 0 /* Reserved */
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.long GPIOTE_IRQHandler /* GPIOTE */
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.long ADC_IRQHandler /* ADC */
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.long TIMER0_IRQHandler /* TIMER0 */
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.long TIMER1_IRQHandler /* TIMER1 */
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.long TIMER2_IRQHandler /* TIMER2 */
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.long RTC0_IRQHandler /* RTC0 */
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.long TEMP_IRQHandler /* TEMP */
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.long RNG_IRQHandler /* RNG */
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.long ECB_IRQHandler /* ECB */
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.long CCM_AAR_IRQHandler /* CCM_AAR */
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.long WDT_IRQHandler /* WDT */
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.long RTC1_IRQHandler /* RTC1 */
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.long QDEC_IRQHandler /* QDEC */
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.long 0 /* Reserved */
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.long SWI0_IRQHandler /* SWI0 */
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.long SWI1_IRQHandler /* SWI1 */
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.long SWI2_IRQHandler /* SWI2 */
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.long SWI3_IRQHandler /* SWI3 */
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.long SWI4_IRQHandler /* SWI4 */
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.long SWI5_IRQHandler /* SWI5 */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.size __Vectors, . - __Vectors
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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.equ NRF_POWER_RAMON_ADDRESS, 0x40000524
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.equ NRF_POWER_RAMON_RAM1ON_ONMODE_Msk, 0x3
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ldr r0, =NRF_POWER_RAMON_ADDRESS
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ldr r2, [r0]
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movs r1, #NRF_POWER_RAMON_RAM1ON_ONMODE_Msk
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orrs r2, r1
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str r2, [r0]
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/* Loop to copy data from read only memory to RAM. The ranges
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* of copy from/to are specified by following symbols evaluated in
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* linker script.
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* __etext: End of code section, i.e., begin of data sections to copy from.
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* __data_start__/__data_end__: RAM address range that data should be
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* copied to. Both must be aligned to 4 bytes boundary. */
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ldr r1, =__etext
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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subs r3, r2
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ble .flash_to_ram_loop_end
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movs r4, 0
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.flash_to_ram_loop:
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ldr r0, [r1,r4]
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str r0, [r2,r4]
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adds r4, 4
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cmp r4, r3
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blt .flash_to_ram_loop
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.flash_to_ram_loop_end:
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ldr r0, =SystemInit
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blx r0
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ldr r0, =_start
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bx r0
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.pool
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.size Reset_Handler, . - Reset_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_default_handler handler_name
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.align 1
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.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
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def_default_handler NMI_Handler
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def_default_handler HardFault_Handler
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def_default_handler SVC_Handler
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def_default_handler PendSV_Handler
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def_default_handler SysTick_Handler
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def_default_handler Default_Handler
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def_default_handler POWER_CLOCK_IRQHandler
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def_default_handler RADIO_IRQHandler
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def_default_handler UART0_IRQHandler
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def_default_handler SPI0_TWI0_IRQHandler
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def_default_handler SPI1_TWI1_IRQHandler
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def_default_handler GPIOTE_IRQHandler
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def_default_handler ADC_IRQHandler
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def_default_handler TIMER0_IRQHandler
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def_default_handler TIMER1_IRQHandler
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def_default_handler TIMER2_IRQHandler
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def_default_handler RTC0_IRQHandler
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def_default_handler TEMP_IRQHandler
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def_default_handler RNG_IRQHandler
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def_default_handler ECB_IRQHandler
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def_default_handler CCM_AAR_IRQHandler
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def_default_handler WDT_IRQHandler
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def_default_handler RTC1_IRQHandler
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def_default_handler QDEC_IRQHandler
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def_default_handler SWI0_IRQHandler
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def_default_handler SWI1_IRQHandler
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def_default_handler SWI2_IRQHandler
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def_default_handler SWI3_IRQHandler
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def_default_handler SWI4_IRQHandler
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def_default_handler SWI5_IRQHandler
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.weak DEF_IRQHandler
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.set DEF_IRQHandler, Default_Handler
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.end
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