Enables HFXO to ensure UART clock stability
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3ba65efbaa
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@ -603,6 +603,9 @@ static int h5_open(struct device *unused)
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uart_irq_rx_disable(hci_uart_dev);
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uart_irq_rx_disable(hci_uart_dev);
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uart_irq_tx_disable(hci_uart_dev);
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uart_irq_tx_disable(hci_uart_dev);
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/* Enable HFXO so that UART clock is stable for 115200 bitrate */
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*(uint32_t *)0x40000000 = 0x1;
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bt_uart_drain(hci_uart_dev);
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bt_uart_drain(hci_uart_dev);
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uart_irq_callback_set(hci_uart_dev, bt_uart_isr);
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uart_irq_callback_set(hci_uart_dev, bt_uart_isr);
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@ -617,7 +620,8 @@ static int h5_open(struct device *unused)
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#if defined(CONFIG_BT_CTLR_ASSERT_HANDLER)
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#if defined(CONFIG_BT_CTLR_ASSERT_HANDLER)
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void bt_ctlr_assert_handle(char *file, u32_t line)
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void bt_ctlr_assert_handle(char *file, u32_t line)
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{
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{
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printk("Assert %s:%u", file, line);
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printk("BT_CTLR Assert %s:%u", file, line);
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sys_reboot(SYS_REBOOT_COLD);
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}
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}
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#endif /* CONFIG_BT_CTLR_ASSERT_HANDLER */
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#endif /* CONFIG_BT_CTLR_ASSERT_HANDLER */
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@ -756,5 +760,3 @@ next:
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net_buf_unref(buf);
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net_buf_unref(buf);
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}
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}
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}
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}
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